文摘
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CCSDS空间图像压缩标准(CCSDS 122.0-B-1)的核心算法之一是三级二维小波变换,此变换适合用可编程逻辑电路实现。文章介绍了整数9/7小波变换的特点,提出了一种基于FPGA的二维变换快速实现结构,该方法利用FPGA内部Block RAM进行行暂存,实现了行列同时变换的效果,节省了内部寄存器资源,并获得了较高的数据吞吐率。在此基础上,文章还给出了两种适用于不同需求的多级变换架构,并通过仿真验证了其合理性。 |
其他语种文摘
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The core standard recommended by CCSDS for spatial digital image compression (CCSDS 122.0-B-1) includes a three-level discrete wavelet transform (DWT), which is suitable for the implementation on logical circuit. In this article, the features of 9/7 integer DWT are introduced and a fast implementation method based on FPGA is proposed. In this method, a number of pieces of on-chip Block RAM are used as cache for row-transformed data so that the row transform and column transform can be processed simultaneously. The method saves logic cells and produces a high data throughput. In addition, based on the method, two kinds of multilevel DWT implementation architectures are given and the availability is verified by simulations. |
来源
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半导体光电
,2012,33(5):747-751 【扩展库】
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关键词
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CCSDS图像压缩
;
小波变换
;
FPGA
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地址
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中国科学院空间科学与应用研究中心, 北京, 100190
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语种
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中文 |
ISSN
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1001-5868 |
学科
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航天(宇宙航行) |
文献收藏号
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CSCD:4698719
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