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基于 Montgomery 模乘的RSA 加密处理器
RSA Encryption Processor Based on Montgomery Modular Multiplication
查看参考文献8篇
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文摘
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提出一种基4 的Montgomery 模乘算法及优化的硬件结构，将传统基2 模乘运算迭代次数减少近一半。在该模乘模块基础上设计高速RSA 加密处理器，采用进位保留形式的全并行模幂运算流程，避免长进位链和中间结果转换的问题。结果表明，该设计同时适应FPGA和ASIC 实现，完成一次标准1 024 位RSA 加密运算仅需9 836 个周期，加密速率提高50%以上。 |
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其他语种文摘
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A radix-4 Montgomery modular multiplication and the optimized circuit architecture are presented. It can reduce iterations of traditional radix-2 modular multiplication to about 50%. Based on this module, the implementation of high speed RSA encryption processor follows completely parallel modular exponentiation flow with Carry Save Addition(CSA) structure to perform long integer arithmetic. This avoids the repeated interim output/output format conversion. Result shows that the optimization is technology independent and thus should suit well for not only FPGA implementation but also ASIC. This design can complete a standard 1 024 bit RSA encrypt operation with only 9 836 clock cycles. Compared to the recently proposed design in the literature, the proposed design can achieve an increase of over 50% in throughput. |
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来源
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计算机工程
,2010,36(13):125-127 【核心库】
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关键词
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RSA 加密
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模乘
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模幂
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蒙哥马利
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进位保留加法器
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地址
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浙江大学超大规模集成电路设计研究所, 杭州, 310027
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语种
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中文 |
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文献类型
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研究性论文 |
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ISSN
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1000-3428 |
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学科
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自动化技术、计算机技术 |
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基金
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国家自然科学基金资助项目
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文献收藏号
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CSCD:3889370
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参考文献 共
8
共1页
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1.
Montgomery P L. Modular Multiplication Without Trial Division.
Mathematics of Computation,1985,44(1):519-521
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CSCD被引
113
次
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2.
Kwon T W. Two Implementation Methods of a 1024-bit RSA Cryptoprocessor Based on Modified Montgomery Algorithm.
Proc. of ISCAS'1,2001
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CSCD被引
1
次
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3.
Bunimov V. A Complexity-effective Version of Montgomery' Algorithm.
Proc. of ISCA'2,2002
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CSCD被引
1
次
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4.
Mcivor C. Modified Montgomery Modular Multiplication and RSA Exponentiation Techniques.
IEEE Proceedings of Computers and Digital Techniques,2004,151(6):402-408
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CSCD被引
3
次
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5.
Feng Gang. Implementation of RSA Based on Modified Montgomery Modular Multiplication Algorithm.
Proc. of International Conference on Scientific Computing,2006
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CSCD被引
1
次
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6.
Hu Zhengbing. An Efficient Architecture of 1024-bits Cryptoprocessor for RSA Cryptosystem Based on Modified Montgomery' Algorithm.
Proc. of IDAACS'7,2007
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CSCD被引
1
次
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7.
Ming-Der Shieh. A New Modular Exponentiation Architecture for Efficient Design of RSA Cryptosystem.
IEEE Transactions on Very Large Scale Integration(VLSI) Systems,2008,16(9):1151-1161
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CSCD被引
1
次
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8.
Jye-Jong Leu. Design Methodology for Booth-encoded Montgomery Module Design for RSA Cryptosystem.
Proc. of ISCAS'0,2000
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CSCD被引
1
次
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